1. Field of the Invention
The present invention relates to an integrated circuit. More particularly, the present invention relates to an apparatus for expressing circuit version identification information.
2. Description of the Related Art
With great leaps in technologies, data storage methods have advanced from the very early vacuum tubes and transistors to integrated circuit chips. An integrated circuit chip not only has a large storage capacity, but also occupies a small volume. It has been widely used in many different fields. Basically, most of the electronic products used in our daily life need to have a control switch; from a simple current-blocking device to a complicated microprocessor controlled system, each item has to be controlled by an integrated circuit chip.
At present, most application specific integrated circuits (ASIC) are required to work with a matching firmware. After a change in the ASIC version, the firmware needs to read out the circuit version identification information from the ASIC, the so-called version number. If the circuit version identification information does not match the firmware, it means that the firmware is unsuitable to run the ASIC having this particular version. As a result, the security mechanism will prevent the ASIC from incorrectly working.
FIG. 1 is a circuit diagram of a conventional circuit version identification apparatus. As shown in FIG. 1, the apparatus includes a pull-up circuit 101, a pull-down circuit 102 and a circuit version identification unit 103. In this example, the pull-up circuit is a P-type transistor 101 and the pull-down circuit is an N-type transistor 102. In addition, the circuit board identification unit 103 is an inverter 103. Moreover, the circuit version identification apparatus is a single bit device. Obviously, the integrated circuit may include a plurality of circuit version identification apparatuses. In other words, the circuit version identification information can be represented by a multiple of bits (the integrated circuit version number). However, only a single bit is shown in the present example.
Before having any changes to the version of the integrated circuit, the circuit version identification apparatus is assumed to output a logic low potential. That is, the input terminal of the inverter 103 is coupled with the drain of the P-type transistor 101, the source of the P-type transistor 101 receives a power source potential VDD, the gate of the P-type transistor 101 is connected to a ground GND, and the input terminal of the inverter 103 and the N-type transistor 102 are in a cut-off state. On the other hand, when the integrated circuit has a changed version and assumes the circuit version identification apparatus needs to output a logic high potential, the input terminal of the inverter 103 will be cut off from the P-type transistor 101. Furthermore, the drain of the N-type transistor 102 is coupled with the input terminal of the inverter 103, the source of the N-type transistor 102 is connected to the ground GND, and the gate of the N-type transistor 102 receives the power source potential VDD.
However, changing the logic state output from the circuit version identification apparatus, for example, from a logic high potential to a logic low potential or from a logic low potential to a logic high potential, requires a change of the photomask. Assume that only the third layer photomask of the original integrated circuit is changed due to some particular function; however, in order to modify the circuit version identification (the version number), a modification of other photomask (for example, the first layer photomask) is required so that the production cost is unavoidably increased.